User not logged in - login - register
Home Calendar Books School Tool Photo Gallery Message Boards Users Statistics Advertise Site Info
go to bottom | |
 Message Boards » » Make File Syntax Page [1]  
Solinari
All American
16957 Posts
user info
edit post

I have a very long make file that I would like to consolidate. It looks like this:


target_a_1: begin
        touch $@
target_a_2: target_a_1
        touch $@
target_b_1: begin
        touch $@
target_b_2: target_b_1
        touch $@
target_c_1: begin
        touch $@
target_c_2: target_c_1
        touch $@
all: target_a_1 target_b_1 target_c1
        touch $@



I would like to change this to look like this pseudo-code:

targets = a b c
foreach(t $targets 
  target_$t_1: begin
          touch $@
  target_$t_2: target_$t_1
          touch $@
)
all: ????


so confused... Is there any way to do this?

[Edited on January 6, 2010 at 11:52 AM. Reason : s]

1/6/2010 11:48:52 AM
Solinari
All American
16957 Posts
user info
edit post

Maybe if sysadmins andd tech support used make files I would have gotten a reply

1/8/2010 8:19:33 AM
scud
All American
10804 Posts
user info
edit post

why not just put the looped behaviour you want in a perl script and invoke that from the makefile

1/8/2010 3:46:55 PM
Solinari
All American
16957 Posts
user info
edit post

Because I need to maintain the make dependencies...

1/8/2010 4:21:28 PM
 Message Boards » Tech Talk » Make File Syntax Page [1]  
go to top | |
Admin Options : move topic | lock topic

© 2024 by The Wolf Web - All Rights Reserved.
The material located at this site is not endorsed, sponsored or provided by or on behalf of North Carolina State University.
Powered by CrazyWeb v2.39 - our disclaimer.